ARCHIVES
Research Article
Scan Chain Dependent Approaching Technique towards Fault Recovery
Ramakrishna Reddy Kareti1
Rajesh Nandalike2
12 Department of Electronics and Communication Engineering, JAIN College of Engineering, Karnataka, India.
Published Online: September-October 2023
Pages: 17-20
Cite this article
No DOIReferences
1. P.K.Samudrala,J.Ramos, and S.Katkoori,(2004) “Selective triple modularred undancy(STMR)based single-eventupset(SEU) to lerant
synthes is forFPGAs,”IEEETrans.Nucl.Sci.,vol.51,no.5,pp.2957–2969
2. S.D’Angelo,C.Metra,andG.Sechi,(1999)“Transient and permanent fault diagnos is for FPGA-based TMR
systems,”inProc.Int.Symp.Defect
3. Fault Tolerance VLSISyst,pp. 330–338.
4. Omar Hiari, Waseem Sadeh, and Osamah Rawashdeh(2012),“Towards Single Chip Diversity TMR for Automotive Applications,”
Volume: 43 , Issue:6,Page(s):2742–2750.
5. J.A.Abraham and D.P.Siewiorek,(1974) “An algorithm for the accurate reliability evaluation of triple modular redundancy
networks,”IEEETrans.
6. Comput.,vol.23,no.7,pp.682–692
7. I. Koren and S. Y. H. Su(1979), “Reliability analysis of N-modular redundancy systems with intermittent and permanent faults,”
IEEE Trans. Comput.,vol.28,no.7,pp.514–520,Jul.
8. M.Zhang,S.Mitra,T.M.Mak,N.Seifert,N.J.Wang,Q.Shi,K.S.Kim,N.R.Shanbhag,andS.J.Patel,(2006)“Sequentialele mentdesign with
built-insofterror resilience,”IEEE Trans. Very Large Scale Integr.(VLSI)Syst.,vol.14,no.12,pp.1368–1378
9. F.L.Kastensmidt,L.Sterpone,L.Carro,andM.S.Reorda.,(2005)“OntheoptimaldesignoftriplemodularredundancylogicforSRAM-
basedFPGAs,”inProc.DesignAutom.TestEur.Conf.Exhibit,pp.1530–159
10. FirozAhmedSiddiqui,PuranGur(2014)“Scan-Chain-BasedMultipleErrorRecoveryinTMRSystems(SMERTMR):AReview”ISSN:2349-
4689Volume-02
synthes is forFPGAs,”IEEETrans.Nucl.Sci.,vol.51,no.5,pp.2957–2969
2. S.D’Angelo,C.Metra,andG.Sechi,(1999)“Transient and permanent fault diagnos is for FPGA-based TMR
systems,”inProc.Int.Symp.Defect
3. Fault Tolerance VLSISyst,pp. 330–338.
4. Omar Hiari, Waseem Sadeh, and Osamah Rawashdeh(2012),“Towards Single Chip Diversity TMR for Automotive Applications,”
Volume: 43 , Issue:6,Page(s):2742–2750.
5. J.A.Abraham and D.P.Siewiorek,(1974) “An algorithm for the accurate reliability evaluation of triple modular redundancy
networks,”IEEETrans.
6. Comput.,vol.23,no.7,pp.682–692
7. I. Koren and S. Y. H. Su(1979), “Reliability analysis of N-modular redundancy systems with intermittent and permanent faults,”
IEEE Trans. Comput.,vol.28,no.7,pp.514–520,Jul.
8. M.Zhang,S.Mitra,T.M.Mak,N.Seifert,N.J.Wang,Q.Shi,K.S.Kim,N.R.Shanbhag,andS.J.Patel,(2006)“Sequentialele mentdesign with
built-insofterror resilience,”IEEE Trans. Very Large Scale Integr.(VLSI)Syst.,vol.14,no.12,pp.1368–1378
9. F.L.Kastensmidt,L.Sterpone,L.Carro,andM.S.Reorda.,(2005)“OntheoptimaldesignoftriplemodularredundancylogicforSRAM-
basedFPGAs,”inProc.DesignAutom.TestEur.Conf.Exhibit,pp.1530–159
10. FirozAhmedSiddiqui,PuranGur(2014)“Scan-Chain-BasedMultipleErrorRecoveryinTMRSystems(SMERTMR):AReview”ISSN:2349-
4689Volume-02
Related Articles
2023
Access to food, employment opportunities of the people in Sundarban areas of West Bengal-A case study
2023
Survey on Missing Object Using IoT
2023
Deep Learning-Based Forensic Face Recognition System
2023
A Robust Hybrid Watermarking Method Based on DWT and SVD for Secured Communication
2023
A technique for evaluating translator performance
2023
